RK3399_MIPI屏调试失败请教
请教各位前辈小弟使用RK3399，其中rk3399-firefly-mipi.dts文件编写如下，但执行完成载后却颢示没有发现设备，也无法使屏点亮。
文件编写是否那里有问题呢？
不好意思要麻烦各位帮我看看了....
/*
* Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
*a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
*b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "rk3399-firefly-port.dtsi"
/ {
model = "Firefly-RK3399 Board mipi (Android)";
compatible = "rockchip,android", "rockchip,rk3399-firefly-mipi", "rockchip,rk3399";
test-power {
status = "okay";
};
};
&backlight {
status = "okay";
pwms = <&pwm1 0 25000 0>;
};
&mipi_dsi {
status = "okay";
dsi_panel: panel {
compatible ="simple-panel-dsi";
reg = <0>;
//ddc-i2c-bu
//power-supply = <&vcc_lcd>;
//pinctrl-0 = <&lcd_panel_reset &lcd_panel_enable>;
backlight = <&backlight>;
/*
enable-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
*/
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST /*| MIPI_DSI_MODE_VIDEO_SYNC_PULSE*/)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
bus-format = <MEDIA_BUS_FMT_RGB666_1X18>;
dsi,lanes = <4>;
dsi,channel = <0>;
delay,enable = <35>;
delay,prepare = <6>;
/*
delay,power = <10>;
delay,reset = <250>;
delay,unreset = <0>;
delay,unpower = <0>;
*/
delay,unprepare = <0>;
delay,disable = <20>;
size,width = <70>;
size,height = <143>;
status = "okay";
panel-init-sequence = [
39 00 03 50 5A 08
39 00 03 80 C8 00
39 00 03 50 5A 09
39 00 11 80 5A 51 B5 2A 6C C5 4A 01 40 E2 0F 81 10 08 F0 B7
39 00 11 90 00 00 42 0A E3 25 99 70 A5 B9 66 20 23 A1 26 00
39 00 08 A0 51 A5 AA AA 00 00 00
39 00 03 50 5A 0A
39 00 11 80 FF 51 A3 02 00 16 25 38 4B 5E 63 93 75 A8 94 63
39 00 11 90 84 60 5C 4B 3A 29 1B 0F 00 16 25 38 4B 5E 63 93
39 00 0E A0 75 A8 94 63 84 60 5C 4B 3A 29 1B 0F 00
//39 00 05 80 FF 51 A3 02
39 00 03 50 5A 0B
39 00 11 80 00 00 20 44 08 00 60 47 00 00 10 22 04 00 B0 23
39 00 03 90 15 00
39 00 03 50 5A 0C
39 00 11 80 FA 68 68 01 2D 82 C0 03 00 60 15 00 50 15 56 51
39 00 11 90 15 55 61 15 00 60 15 00 50 15 56 51 15 55 61 95
39 00 11 A0 AB 18 00 05 00 05 00 05 80 4C 29 84 52 01 09 00
39 00 03 B0 00 00
39 00 03 50 5A 0D
39 00 08 80 F0 B1 71 EF 49 C0 80
39 00 03 50 5A 0E
39 00 09 80 FF 01 55 55 32 98 76 1C
39 00 03 50 5A 0F
39 00 11 80 F1 0A 64 E0 10 A0 63 08 A2 41 C8 48 03 82 4C 4C
39 00 11 90 68 68 68 4C 4C 7C 14 00 20 06 C2 00 04 06 0C 00
39 00 05 A0 00 92 00 00
39 00 03 50 5A 10
39 00 11 80 00 80 03 E7 1F 17 20 48 40 02 CF 18 3C 88 41 8A
39 00 10 90 39 28 A9 C5 9A 7B F0 07 7E E0 07 7E 20 10 00
39 00 03 50 5A 11
39 00 11 80 46 77 03 40 CA F3 FF 83 30 08 C4 06 A1 D8 24 18
39 00 11 90 30 C6 66 C1 80 31 15 CB E5 D2 68 6C 36 1D 04 C8
39 00 11 A0 B0 D9 88 60 B0 81 40 1A 1B 48 63 03 B9 00 1C 80
39 00 11 B0 50 30 00 E0 E1 01 00 28 0E 06 43 55 55 55 55 55
39 00 11 C0 95 88 88 88 88 88 C8 08 86 C6 E3 81 00 20 00 21
39 00 11 D0 42 88 00 00 00 00 40 00 00 31 04 41 06 00 00 00
39 00 11 E0 00 00 00 00 00 00 00 00 00 00 00 00 00 85 11 0C
39 00 10 F0 00 00 40 00 00 00 00 5E 4A 01 78 00 08 00 00
39 00 03 50 5A 12
39 00 11 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 11 90 00 00 00 00 00 00 00 96 02 00 00 00 00 00 00 00
39 00 05 A0 00 00 00 00
39 00 03 50 5A 13
39 00 11 80 01 00 00 0C 00 00 00 00 01 04 01 1C 44 0C CE E7
39 00 0F 90 62 0E 24 98 AC 21 B1 88 D0 93 24 49 06 00
39 00 03 50 5A 14
39 00 11 80 51 01 00 A0 E8 EF F7 FB FD 7E 01 00 C0 67 C5 06
39 00 11 90 7E 4F 60 0B 2A 12 02 9B 10 79 10 00 00 00 00 00
39 00 11 A0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 11 B0 00 00 00 00 00 00 10 00 00 34 2D D3 1A 00 40 A1
39 00 11 C0 50 78 0B FD 39 81 51 00 6F A0 3F 27 30 0A E0 15
39 00 11 D0 F4 E7 04 46 01 BC 86 FE 9C C0 28 00 00 00 00 00
39 00 11 E0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 11 F0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 03 50 5A 15
39 00 11 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 11 90 00 00 81 0A 00 00 00 00 00 00 1C 31 6A B5 21 B4
39 00 11 A0 5A 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 11 B0 00 00 00 00 00 00 00 00 13 00 F0 00 14 AA 55 57
39 00 11 C0 B3 6D DB F6 28 DA 76 08 A2 B6 6D DB B6 85 DA 55
39 00 11 D0 35 DB B6 6D 01 A1 6D 09 43 6A DB B6 6D 5B A9 55
39 00 11 E0 57 B3 6D DB D6 20 DA 56 00 A0 B6 6D DB B6 8D DA
39 00 11 F0 55 35 DB B6 6D 83 A1 6D 8B 83 6A DB B6 6D 5B 00
39 00 03 50 5A 16
39 00 11 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 07 90 00 00 00 00 D0 40
39 00 03 50 5A 18
39 00 11 80 EF BD F7 DE 7B EF 3D 00 08 0A 0C 0C 0C 0C 0C 0C
39 00 11 90 0C 0C 5C 09 A8 AA AA AA AA AA AA AA AA AA 5A 59
39 00 11 A0 59 59 59 59 59 59 59 59 59 59 09 40 FF 05 00 80
39 00 10 B0 80 00 04 20 00 01 08 40 00 02 10 80 00 04 0F
39 00 03 50 5A 19
39 00 11 80 F0 D9 C8 BA AF A6 9E 98 92 8D 88 84 00 F0 6F F6
39 00 11 90 CF FC 6F F6 FE FC 0A FF AF B5 71 0E 6C 4A 69 08
39 00 05 A0 00 00 00 00
39 00 03 50 5A 1A
39 00 11 80 00 04 08 0C 00 10 14 18 1C 00 20 28 30 38 00 40
39 00 11 90 48 50 58 00 60 68 70 78 00 80 88 90 98 00 A0 A8
39 00 11 A0 B0 B8 00 C0 C8 D0 D8 00 E0 E8 F0 F8 00 FC FE FF
39 00 11 B0 00 00 04 08 0C 00 10 14 18 1C 00 20 28 30 38 00
39 00 11 C0 40 48 50 58 00 60 68 70 78 00 80 88 90 98 00 A0
39 00 11 D0 A8 B0 B8 00 C0 C8 D0 D8 00 E0 E8 F0 F8 00 FC FE
39 00 11 E0 FF 00 00 04 08 0C 00 10 14 18 1C 00 20 28 30 38
39 00 11 F0 00 40 48 50 58 00 60 68 70 78 00 80 88 90 98 00
39 00 03 50 5A 1B
39 00 11 80 A0 A8 B0 B8 00 C0 C8 D0 D8 00 E0 E8 F0 F8 00 FC
39 00 05 90 FE FF 00 00
39 00 03 50 5A 20
39 00 08 80 74 00 00 00 00 00 00
39 00 03 50 5A 22
39 00 0E 80 AD D4 00 55 55 55 55 55 55 55 55 1F 00
39 00 03 50 5A 23
39 00 11 80 01 05 00 05 00 00 00 00 00 00 00 00 00 00 00 00
39 00 11 90 FF 0F 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 03 50 5A 24
39 00 11 80 00 03 00 FF FF 20 00 00 00 00 00 00 00 00 B9 CD
//39 00 04 90 5A 00 00
//39 00 02 90 A5
//39 00 03 50 00 2F
//39 00 03 50 5A 0A
//39 00 15 84 00 01 16 2B 40 55 5C 90 6D A1 9A 69 91 65 61 51 40 30 23
//39 00 15 98 00 01 16 2B 40 55 5C 90 6D A1 9A 69 91 65 61 51 40 30 23
05 80 01 11
05 80 01 29
];
panel-exit-sequence = [
05 05 01 28
05 78 01 10
];
power_ctr: power_ctr {
rockchip,debug = <0>;
lcd_en: lcd-en {
gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_panel_enable>;
rockchip,delay = <10>;
};
lcd_rst: lcd-rst {
gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_panel_reset>;
rockchip,delay = <6>;
};
};
disp_timings: display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <7800000>;
hactive = <720>;
vactive = <1440>;
hsync-len = <14>; //20, 50
hback-porch = <25>; //50, 56
hfront-porch = <45>;//50, 30
vsync-len = <8>;
vback-porch = <106>;
vfront-porch = <240>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <1>;
};
};
};
};
&pwm1 {
status = "okay";
};
&mipi_in_vopl {
status = "disabled";
};
&mipi_in_vopb {
status = "okay";
};
&hdmi {
status = "okay";
};
&hdmi_in_vopb {
status = "disabled";
};
&hdmi_in_vopl {
status = "okay";
};
&cdn_dp {
status = "okay";
extcon = <&fusb0>;
phys = <&tcphy0_dp>;
};
&dp_in_vopb {
status = "disabled";
};
&hdmi_sound {
status = "okay";
};
&i2s2 {
status = "okay";
};
&i2c4 {
status = "okay";
gsl3680: gsl3680@41 {
status = "okay";
compatible = "gslX680";
reg = <0x40>;
screen_max_x = <1536>;
screen_max_y = <2048>;
touch-gpio = <&gpio4 28 IRQ_TYPE_LEVEL_LOW>;
reset-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
};
mpu6050:mpu@68{
status = "okay";
compatible = "invensense,mpu6050";
reg = <0x68>;
mpu-int_config = <0x10>;
mpu-level_shifter = <0>;
mpu-orientation = <0 1 0 1 0 0 0 0 1>;
orientation-x= <1>;
orientation-y= <1>;
orientation-z= <1>;
irq-gpio = <&gpio1 4 IRQ_TYPE_LEVEL_LOW>;
mpu-debug = <1>;
};
};
&vopb {
assigned-clocks = <&cru DCLK_VOP0_DIV>;
assigned-clock-parents = <&cru PLL_CPLL>;
};
&vopl {
assigned-clocks = <&cru DCLK_VOP1_DIV>;
assigned-clock-parents = <&cru PLL_VPLL>;
};
&route_hdmi {
status = "disabled";
logo,mode = "center";
};
&route_mipi {
status = "okay";
logo,mode = "center";
};
&pinctrl {
lcd-panel {
lcd_panel_reset: lcd-panel-reset {
rockchip,pins = <4 29 RK_FUNC_GPIO &pcfg_pull_down>;
};
lcd_panel_enable: lcd-panel-enable {
rockchip,pins = <1 1 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
};
楼主，问题解决了么？ 请问，vopb vopl 为啥要切换
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