MIPI dsi 的dts的Timing问题
本帖最后由 tndcool86 于 2018-6-27 13:20 编辑rk3399-firefly-mipi.dts文件中，Timing的参
，请问 clock-frequency = <80000000>;是怎么得出来的？
disp_timings: display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <80000000>;
hactive = <768>;
vactive = <1024>;
hsync-len = <20>; //20, 50
hback-porch = <130>; //50, 56
hfront-porch = <150>;//50, 30
vsync-len = <40>;
vback-porch = <130>;
vfront-porch = <136>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
谢谢 屏幕对应的技术手册里面都是有的
screen-type = <SCREEN_MIPI>; //单MIPI SCREEN_MIPI; 双mipiSCREEN_DUAL_MIPI
lvds-format = <LVDS_8BIT_2>; //和lvds相关的
out-face = <OUT_P666>; //屏幕接线格式配置颜色，可为OUT_P888（24位）、OUT_P666（18位）或者OUT_P565（16位）
clock-frequency = <67000000>; //dclk频率 数据手册里面有相关数据
hactive = <768>; //水平有效像素
vactive = <1024>; //垂直有效像素
hback-porch = <56>; //水平同步信号 后肩
hfront-porch = <60>; //水平同步信号 前肩
vback-porch = <30>; //垂直同步信号 后肩
vfront-porch = <36>; //垂直同步信号前肩
hsync-len = <64>; //水平垂直信号
vsync-len = <14>; //垂直同步信号
/*
hactive = <1024>;
vactive = <768>;
hback-porch = <56>;
hfront-porch = <60>;
vback-porch = <30>;
vfront-porch = <36>;
hsync-len = <64>;
vsync-len = <14>;
*/
hsync-active = <0>; //极性控制 置1 反转特性
vsync-active = <0>;
de-active = <0>; //DEN 极性控制
pixelclk-active = <0>; //dclk 极性控制
swap-rb = <0>; // 设1 反转颜色 red 和blue
swap-rg = <0>;
swap-gb = <0>;
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