/*
* csi2_dphy0: used for csi2 dphy full mode,
is mutually exclusive with
csi2_dphy1 and csi2_dphy2
* csi2_dphy1: used for csi2 dphy split mode,
physical lanes use lane0 and lane1,
can be used with csi2_dphy2 parallel
* csi2_dphy2: used for csi2 dphy split mode,
physical lanes use lane2 and lane3,
can be used with csi2_dphy1 parallel
*/
&csi2_dphy_hw {
status = "okay";
};
&rkisp {
status = "okay";
};
&rkisp_mmu {
status = "okay";
};
&rkcif {
status = "okay";
};
&rkcif_mmu {
status = "okay";
};
&csi2_dphy0 {
status = "disabled";
};
&csi2_dphy1 {
status = "okay";
/*
* dphy1 only used for split mode,
* can be used concurrently with dphy2
* full mode and split mode are mutually exclusive
*/
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
&csi2_dphy2 {
status = "okay";
/*
* dphy2 only used for split mode,
* can be used concurrently with dphy1
* full mode and split mode are mutually exclusive
*/
ports {
#address-cells = <1>;
#size-cells = <0>;