|
目前遇到問題: RK3588S HDMI0/eDP0 Frame rate =60z 1920X1200 可以正常顯屏 ,
Frame rate =30z 3840X2400 可以正常顯屏 , 大於30Hz無法顯示(黑屏)
Frame rate =30z 2880X1800 也無法顯示(黑屏)
查詢datasheet, eDP0 可以支援5.4Gbps , 但我怎麼調都無法正常成功點亮3840x2400 Frame rate=60Hz,
請教各位前輩,這是設定問題,還是硬件(Bridge PCBa)問題?
不知各位大大是否有遇見此類問題,煩請解惑~謝謝!
系統Video Portx信息
C:\adb>adb shell wm size
Physical size: 2880x1800
C:\adb>adb shell
rk3588s_s:/ $ cat /d/dri/0/summary
Video Port0: ACTIVE
Connector: eDP-1
bus_format[100a]: RGB888_1X24
overlay_mode[0] output_mode[f] color_space[0], eotf:0
Display mode: 2880x1800p60
clk[326131] real_clk[300000] type[48] flag[a]
H: 2880 2912 2920 2980
V: 1800 1808 1816 1824
Esmart0-win0: ACTIVE
win_id: 8
format: NV12 little-endian (0x3231564e) SDR[0] color_space[0] glb_alpha[0xff]
rotate: xmirror: 0 ymirror: 0 rotate_90: 0 rotate_270: 0
csc: y2r[1] r2y[0] csc mode[1]
zpos: 0
src: pos[0, 0] rect[1920 x 1080]
dst: pos[0, 0] rect[2880 x 1800]
buf[0]: addr: 0x00000000feac4000 pitch: 1920 offset: 0
buf[1]: addr: 0x00000000feac4000 pitch: 1920 offset: 2088960
Cluster0-win0: ACTIVE
win_id: 0
format: AB24 little-endian (0x34324241)[AFBC] SDR[0] color_space[0] glb_alpha[0xff]
rotate: xmirror: 0 ymirror: 0 rotate_90: 0 rotate_270: 0
csc: y2r[0] r2y[0] csc mode[0]
zpos: 1
src: pos[0, 0] rect[2880 x 1800]
dst: pos[0, 0] rect[2880 x 1800]
buf[0]: addr: 0x00000000f46e6000 pitch: 11520 offset: 0
Video Port1: DISABLED
Video Port2: ACTIVE
Connector: DSI-1
bus_format[100a]: RGB888_1X24
overlay_mode[0] output_mode[0] color_space[0], eotf:0
Display mode: 800x1280p54
clk[62100] real_clk[62100] type[48] flag[0]
H: 800 840 845 865
V: 1280 1310 1315 1327
Esmart2-win0: ACTIVE
win_id: 9
format: NV12 little-endian (0x3231564e) SDR[0] color_space[0] glb_alpha[0xff]
rotate: xmirror: 0 ymirror: 0 rotate_90: 0 rotate_270: 0
csc: y2r[1] r2y[0] csc mode[1]
zpos: 0
src: pos[0, 0] rect[1920 x 1080]
dst: pos[0, 390] rect[800 x 500]
buf[0]: addr: 0x00000000feac4000 pitch: 1920 offset: 0
buf[1]: addr: 0x00000000feac4000 pitch: 1920 offset: 2088960
Cluster2-win0: ACTIVE
win_id: 4
format: AB24 little-endian (0x34324241)[AFBC] SDR[0] color_space[0] glb_alpha[0xff]
rotate: xmirror: 0 ymirror: 0 rotate_90: 0 rotate_270: 0
csc: y2r[0] r2y[0] csc mode[0]
zpos: 1
src: pos[0, 0] rect[800 x 1280]
dst: pos[0, 0] rect[800 x 1280]
buf[0]: addr: 0x00000000f85c1000 pitch: 3200 offset: 0
Video Port3: ACTIVE
Connector: DSI-2
bus_format[100a]: RGB888_1X24
overlay_mode[0] output_mode[0] color_space[0], eotf:0
Display mode: 800x1280p54
clk[62100] real_clk[60495] type[48] flag[0]
H: 800 840 845 865
V: 1280 1310 1315 1327
Esmart3-win0: ACTIVE
win_id: 11
format: NV12 little-endian (0x3231564e) SDR[0] color_space[0] glb_alpha[0xff]
rotate: xmirror: 0 ymirror: 0 rotate_90: 0 rotate_270: 0
csc: y2r[1] r2y[0] csc mode[1]
zpos: 0
src: pos[0, 0] rect[1920 x 1080]
dst: pos[0, 390] rect[800 x 500]
buf[0]: addr: 0x00000000feac4000 pitch: 1920 offset: 0
buf[1]: addr: 0x00000000feac4000 pitch: 1920 offset: 2088960
Cluster3-win0: ACTIVE
win_id: 6
format: AB24 little-endian (0x34324241)[AFBC] SDR[0] color_space[0] glb_alpha[0xff]
rotate: xmirror: 0 ymirror: 0 rotate_90: 0 rotate_270: 0
csc: y2r[0] r2y[0] csc mode[0]
zpos: 1
src: pos[0, 0] rect[800 x 1280]
dst: pos[0, 0] rect[800 x 1280]
buf[0]: addr: 0x00000000f3f3c000 pitch: 3200 offset: 0
rk3588s_s:/ $
2880x180.dtsi
&dsi0 {
status = "okay";
};
&dsi0_in_vp3 {
status = "disabled";
};
&dsi0_in_vp2 {
status = "okay";
};
&dsi0_panel {
status = "okay";
reset-gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>;
enable-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lcd0_rst_gpio>;
};
&route_dsi0 {
status = "disabled";
connect = <&vp3_out_dsi0>;
};
&pwm6 {
status = "okay";
pinctrl-names = "active";
pinctrl-0 = <&pwm6m0_pins>;
};
&backlight {
pwms = <&pwm6 0 25000 0>;
status = "okay";
};
&route_dsi1 {
status = "disabled";
connect = <&vp3_out_dsi1>;
};
&dsi1_panel {
status = "okay";
reset-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_LOW>;
enable-gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lcd1_rst_gpio>;
};
&dsi1 {
status = "okay";
};
&dsi1_in_vp2 {
status = "disabled";
};
&dsi1_in_vp3 {
status = "okay";
};
&dp0 {
status = "okay";
};
&dp0_in_vp2 {
status = "disabled";
};
&dp0_in_vp1 {
status = "okay";
};
&dp0_sound{
status = "okay";
};
&spdif_tx2{
status = "okay";
};
&hdmi0 {
//status = "okay";
status = "disabled"; //modify for EDP0 24.04.10
};
&hdmi0_in_vp0 {
//status = "okay";
status = "disabled"; //modify for EDP0 25.01.16
};
&hdmi0_sound {
//status = "okay";
status = "disabled"; //modify for EDP0 25.01.16
};
&hdptxphy_hdmi0 {
//status = "okay";
status = "disabled"; //modify for EDP0 25.01.16
};
&route_hdmi0{
//status = "okay";
status = "disabled"; //modify for EDP0 25.01.16
};
/ {
panel-edp {
status = "okay";
compatible = "simple-panel";
panel-timing {
clock-frequency = <326131200>;// 652262400(120HZ) 326131200(60HZ)
hactive = <2880>;
vactive = <1800>;
hback-porch = <60>;//100
hfront-porch = <32>;//48
vback-porch = <8>;// 16
vfront-porch = <8>;//8
hsync-len = <8>;//32
vsync-len = <8>;//8
hsync-active = <0>;//1
vsync-active = <0>;//1
de-active = <0>;//0
pixelclk-active = <0>;//0
swap-rb = <0>;//0
swap-rg = <0>;//0
swap-gb = <0>;//0
};
port {
panel_in_edp: endpoint {
remote-endpoint = <&edp_out_panel>;
};
};
};
};
&edp0 {
force-hpd;
status = "okay";
ports {
port@1 {
reg = <1>;
edp_out_panel: endpoint {
remote-endpoint = <&panel_in_edp>;
};
};
};
};
&hdptxphy0{
status = "okay";
};
&edp0_in_vp0 {
status = "okay";
};
&route_edp0 {
connect = <&vp0_out_edp0>;
status = "okay";
};
|
|