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更新固件后,烧录自己编译kernel,板子无限重启,”Rockusb Device”无法识别。
发表于 2019-7-2 11:03:33
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回复:11
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1.”Rockusb Device”无法识别是电脑驱动问题,还是板子问题?
2.此时能不能强行进入maskrom模式?
板子无限重启,打印如下:
- DDR Version 1.19 20190305
- In
- Channel 0: DDR3, 800MHz
- Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
- Channel 1: DDR3, 800MHz
- Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
- 256B stride
- ch 0 ddrconfig = 0x101, ddrsize = 0x2020
- ch 1 ddrconfig = 0x101, ddrsize = 0x2020
- pmugrf_os_reg[2] = 0x3AA17AA1, stride = 0xD
- OUT
- Boot1: 2019-03-14, version: 1.19
- CPUId = 0x0
- ChipType = 0x10, 231
- SdmmcInit=2 0
- BootCapSize=100000
- UserCapSize=119276MB
- FwPartOffset=2000 , 100000
- mmc0:cmd8,20
- mmc0:cmd5,20
- mmc0:cmd55,20
- mmc0:cmd1,20
- mmc0:cmd8,20
- mmc0:cmd5,20
- mmc0:cmd55,20
- mmc0:cmd1,20
- mmc0:cmd8,20
- mmc0:cmd5,20
- mmc0:cmd55,20
- mmc0:cmd1,20
- SdmmcInit=0 1
- StorageInit ok = 67347
- SecureMode = 0
- SecureInit read PBA: 0x4
- SecureInit read PBA: 0x404
- SecureInit read PBA: 0x804
- SecureInit read PBA: 0xc04
- SecureInit read PBA: 0x1004
- SecureInit read PBA: 0x1404
- SecureInit read PBA: 0x1804
- SecureInit read PBA: 0x1c04
- SecureInit ret = 0, SecureMode = 0
- atags_set_bootdev: ret:(0)
- GPT part: 0, name: uboot, start:0x4000, size:0x2000
- GPT part: 1, name: trust, start:0x6000, size:0x2000
- GPT part: 2, name: boot, start:0xa000, size:0x10000
- GPT part: 3, name: backup, start:0x2a000, size:0x10000
- GPT part: 4, name: rootfs, start:0x5a000, size:0xe89bfdf
- find part:uboot OK. first_lba:0x4000.
- find part:trust OK. first_lba:0x6000.
- LoadTrust Addr:0x6000
- No find bl30.bin
- Load uboot, ReadLba = 4000
- Load OK, addr=0x200000, size=0xd6fac
- RunBL31 0x10000
- NOTICE: BL31: v1.3(debug):370ab80
- NOTICE: BL31: Built : 09:23:41, Mar 4 2019
- NOTICE: BL31: Rockchip release version: v1.1
- INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
- INFO: Using opteed sec cpu_context!
- INFO: boot cpu mask: 0
- INFO: plat_rockchip_pmu_init(1181): pd status 3e
- INFO: BL31: Initializing runtime services
- INFO: BL31: Initializing BL32
- INF [0x0] TEE-CORE:init_primary_helper:337: Initializing (1.1.0-195-g8f090d20 #6 Fri Dec 7 06:11:20 UTC 2018 aarch64)
- INF [0x0] TEE-CORE:init_primary_helper:338: Release version: 1.2
- INF [0x0] TEE-CORE:init_teecore:83: teecore inits done
- INFO: BL31: Preparing for EL3 exit to normal world
- INFO: Entry point address = 0x200000
- INFO: SPSR = 0x3c9
- U-Boot 2017.09-02577-g0b1f585 (Apr 03 2019 - 10:12:37 +0800)
- Model: Firefly-RK3399 Board
- PreSerial: 2
- DRAM: 3.8 GiB
- Relocation Offset is: f5bee000
- Sysmem: init
- Using default environment
- dwmmc@fe320000: 1, sdhci@fe330000: 0
- Bootdev(atags): mmc 0
- PartType: EFI
- get part misc fail -1
- boot mode: None
- bad resource image magic:
- DTB: rk-kernel.dtb
- invalid entry tag
- invalid entry tag
- invalid entry tag
- invalid entry tag
- invalid entry tag
- invalid entry tag
- invalid entry tag
- invalid entry tag
- "Synchronous Abort" handler, esr 0x96000010
- * Relocate offset = 00000000f5bee000
- * ELR(PC) = 000000000028407c
- * LR = 0000000000203a8c
- * SP = 00000000e9de2020
- * ESR_EL2 = 0000000096000010
- EC[31:26] == 100101, Exception from a Data abort, from current exception level
- IL[25] == 1, 32-bit instruction trapped
- * DAIF = 00000000000003c0
- D[9] == 1, DBG masked
- A[8] == 1, ABORT masked
- I[7] == 1, IRQ masked
- F[6] == 1, FIQ masked
- * SPSR_EL2 = 0000000020000349
- D[9] == 1, DBG masked
- A[8] == 1, ABORT masked
- I[7] == 0, IRQ not masked
- F[6] == 1, FIQ masked
- M[4] == 0, Exception taken from AArch64
- M[3:0] == 1001, EL2h
- * SCTLR_EL2 = 0000000030c51835
- I[12] == 1, Icaches enabled
- C[2] == 1, Dcache enabled
- M[0] == 1, MMU enabled
- * HCR_EL2 = 000000000800003a
- * VBAR_EL2 = 00000000f5dee800
- * TTBR0_EL2 = 00000000f7ff0000
- x0 : 000000000841e600 x1 : 00000000f5e8fb8e
- x2 : 0000000000000004 x3 : 00000000ff1a0000
- x4 : 0000000000000000 x5 : 0000000000000004
- x6 : 000000000841e600 x7 : 00000000f5ea7f40
- x8 : 00000000e9de20c0 x9 : 0000000000000008
- x10: 00000000ffffffd8 x11: 0000000000000006
- x12: 000000000001869f x13: 0000000000000200
- x14: 00000000e9de2418 x15: 0000000000000002
- x16: 0000000000000000 x17: 0000000000000000
- x18: 00000000e9de5d98 x19: 00000000f5ea5000
- x20: 0000000008300000 x21: 000000000841e600
- x22: 0000000000000000 x23: 000000000001f600
- x24: 0000000008300000 x25: 00000000f5ec2000
- x26: 0000000000000000 x27: 0000000000000000
- x28: 0000000000000000 x29: 00000000e9de2200
- SP:
- e9de2020: 00000000 00000000 00000000 00000000
- e9de2030: 00000000 00000000 f5e9be9f 00000000
- e9de2040: 00000000 00000000 00000000 00000000
- e9de2050: f5e9bee6 00000000 f5e9bf0c 00000000
- e9de2060: f5e9bf59 00000000 f5e9bfa6 00000000
- e9de2070: f5e9bfe6 00000000 f5e9c026 00000000
- e9de2080: f5e9c063 00000000 00000000 00000000
- e9de2090: 00000000 00000000 f5e9c0a0 00000000
- e9de20a0: e9de2200 00000000 f5deea0c 00000000
- e9de20b0: f5ea5000 00000000 08300000 00000000
- e9de20c0: f7ff0000 00000000 0800003a 00000000
- e9de20d0: 30c51835 00000000 e9de2020 00000000
- e9de20e0: 20000349 00000000 f5dee800 00000000
- e9de20f0: 000003c0 00000000 96000010 00000000
- e9de2100: f5e7207c 00000000 0841e600 00000000
- e9de2110: f5e8fb8e 00000000 00000004 00000000
- Resetting CPU ...
- WAR▒DDR Version 1.19 20190305
- In
- soft reset
- SRX
- Channel 0: DDR3, 800MHz
- Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
- Channel 1: DDR3, 800MHz
- Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
- 256B stride
- ch 0 ddrconfig = 0x101, ddrsize = 0x2020
- ch 1 ddrconfig = 0x101, ddrsize = 0x2020
- pmugrf_os_reg[2] = 0x3AA17AA1, stride = 0xD
- OUT
- Boot1: 2019-03-14, version: 1.19
- CPUId = 0x0
- ChipType = 0x10, 293
- SdmmcInit=2 0
- BootCapSize=100000
- UserCapSize=119276MB
- FwPartOffset=2000 , 100000
- mmc0:cmd8,20
- mmc0:cmd5,20
- mmc0:cmd55,20
- mmc0:cmd1,20
- mmc0:cmd8,20
- mmc0:cmd5,20
- mmc0:cmd55,20
- mmc0:cmd1,20
- mmc0:cmd8,20
- mmc0:cmd5,20
- mmc0:cmd55,20
- mmc0:cmd1,20
- SdmmcInit=0 1
- StorageInit ok = 67846
- SecureMode = 0
- SecureInit read PBA: 0x4
- SecureInit read PBA: 0x404
- SecureInit read PBA: 0x804
- SecureInit read PBA: 0xc04
- SecureInit read PBA: 0x1004
- SecureInit read PBA: 0x1404
- SecureInit read PBA: 0x1804
- SecureInit read PBA: 0x1c04
- SecureInit ret = 0, SecureMode = 0
- atags_set_bootdev: ret:(0)
- GPT part: 0, name: uboot, start:0x4000, size:0x2000
- GPT part: 1, name: trust, start:0x6000, size:0x2000
- GPT part: 2, name: boot, start:0xa000, size:0x10000
- GPT part: 3, name: backup, start:0x2a000, size:0x10000
- GPT part: 4, name: rootfs, start:0x5a000, size:0xe89bfdf
- find part:uboot OK. first_lba:0x4000.
- find part:trust OK. first_lba:0x6000.
- LoadTrust Addr:0x6000
- No find bl30.bin
- Load uboot, ReadLba = 4000
- Load OK, addr=0x200000, size=0xd6fac
- RunBL31 0x10000
- NOTICE: BL31: v1.3(debug):370ab80
- NOTICE: BL31: Built : 09:23:41, Mar 4 2019
- NOTICE: BL31: Rockchip release version: v1.1
- INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
- INFO: Using opteed sec cpu_context!
- INFO: boot cpu mask: 0
- INFO: plat_rockchip_pmu_init(1181): pd status 3e
- INFO: BL31: Initializing runtime services
- INFO: BL31: Initializing BL32
- INF [0x0] TEE-CORE:init_primary_helper:337: Initializing (1.1.0-195-g8f090d20 #6 Fri Dec 7 06:11:20 UTC 2018 aarch64)
- INF [0x0] TEE-CORE:init_primary_helper:338: Release version: 1.2
- INF [0x0] TEE-CORE:init_teecore:83: teecore inits done
- INFO: BL31: Preparing for EL3 exit to normal world
- INFO: Entry point address = 0x200000
- INFO: SPSR = 0x3c9
- U-Boot 2017.09-02577-g0b1f585 (Apr 03 2019 - 10:12:37 +0800)
- Model: Firefly-RK3399 Board
- PreSerial: 2
- DRAM: 3.8 GiB
- Relocation Offset is: f5bee000
- Sysmem: init
- Using default environment
- dwmmc@fe320000: 1, sdhci@fe330000: 0
- Bootdev(atags): mmc 0
- PartType: EFI
- get part misc fail -1
- boot mode: normal
- bad resource image magic:
- DTB: rk-kernel.dtb
- invalid entry tag
- invalid entry tag
- invalid entry tag
- invalid entry tag
- invalid entry tag
- invalid entry tag
- invalid entry tag
- invalid entry tag
- "Synchronous Abort" handler, esr 0x96000010
- * Relocate offset = 00000000f5bee000
- * ELR(PC) = 000000000028407c
- * LR = 0000000000203a8c
- * SP = 00000000e9de2020
- * ESR_EL2 = 0000000096000010
- EC[31:26] == 100101, Exception from a Data abort, from current exception level
- IL[25] == 1, 32-bit instruction trapped
- * DAIF = 00000000000003c0
- D[9] == 1, DBG masked
- A[8] == 1, ABORT masked
- I[7] == 1, IRQ masked
- F[6] == 1, FIQ masked
- * SPSR_EL2 = 0000000020000349
- D[9] == 1, DBG masked
- A[8] == 1, ABORT masked
- I[7] == 0, IRQ not masked
- F[6] == 1, FIQ masked
- M[4] == 0, Exception taken from AArch64
- M[3:0] == 1001, EL2h
- * SCTLR_EL2 = 0000000030c51835
- I[12] == 1, Icaches enabled
- C[2] == 1, Dcache enabled
- M[0] == 1, MMU enabled
- * HCR_EL2 = 000000000800003a
- * VBAR_EL2 = 00000000f5dee800
- * TTBR0_EL2 = 00000000f7ff0000
- x0 : 000000000841e600 x1 : 00000000f5e8fb8e
- x2 : 0000000000000004 x3 : 00000000ff1a0000
- x4 : 0000000000000000 x5 : 0000000000000004
- x6 : 000000000841e600 x7 : 00000000f5ea7f40
- x8 : 00000000e9de20c0 x9 : 0000000000000008
- x10: 00000000ffffffd8 x11: 0000000000000006
- x12: 000000000001869f x13: 0000000000000200
- x14: 00000000e9de2418 x15: 0000000000000002
- x16: 0000000000000000 x17: 0000000000000000
- x18: 00000000e9de5d98 x19: 00000000f5ea5000
- x20: 0000000008300000 x21: 000000000841e600
- x22: 0000000000000000 x23: 000000000001f600
- x24: 0000000008300000 x25: 00000000f5ec2000
- x26: 0000000000000000 x27: 0000000000000000
- x28: 0000000000000000 x29: 00000000e9de2200
- SP:
- e9de2020: 00000000 00000000 00000000 00000000
- e9de2030: 00000000 00000000 f5e9be9f 00000000
- e9de2040: 00000000 00000000 00000000 00000000
- e9de2050: f5e9bee6 00000000 f5e9bf0c 00000000
- e9de2060: f5e9bf59 00000000 f5e9bfa6 00000000
- e9de2070: f5e9bfe6 00000000 f5e9c026 00000000
- e9de2080: f5e9c063 00000000 00000000 00000000
- e9de2090: 00000000 00000000 f5e9c0a0 00000000
- e9de20a0: e9de2200 00000000 f5deea0c 00000000
- e9de20b0: f5ea5000 00000000 08300000 00000000
- e9de20c0: f7ff0000 00000000 0800003a 00000000
- e9de20d0: 30c51835 00000000 e9de2020 00000000
- e9de20e0: 20000349 00000000 f5dee800 00000000
- e9de20f0: 000003c0 00000000 96000010 00000000
- e9de2100: f5e7207c 00000000 0841e600 00000000
- e9de2110: f5e8fb8e 00000000 00000004 00000000
- Resetting CPU ...
- WAR▒DDR Version 1.19 20190305
- In
- soft reset
- SRX
- Channel 0: DDR3, 800MHz
- Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
- Channel 1: DDR3, 800MHz
- Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
- 256B stride
- ch 0 ddrconfig = 0x101, ddrsize = 0x2020
- ch 1 ddrconfig = 0x101, ddrsize = 0x2020
- pmugrf_os_reg[2] = 0x3AA17AA1, stride = 0xD
- OUT
- Boot1: 2019-03-14, version: 1.19
- CPUId = 0x0
- ChipType = 0x10, 292
- SdmmcInit=2 0
- BootCapSize=100000
- UserCapSize=119276MB
- FwPartOffset=2000 , 100000
- mmc0:cmd8,20
- mmc0:cmd5,20
- mmc0:cmd55,20
- mmc0:cmd1,20
- mmc0:cmd8,20
- mmc0:cmd5,20
- mmc0:cmd55,20
- mmc0:cmd1,20
- mmc0:cmd8,20
- mmc0:cmd5,20
- mmc0:cmd55,20
- mmc0:cmd1,20
- SdmmcInit=0 1
- StorageInit ok = 67906
- SecureMode = 0
- SecureInit read PBA: 0x4
- SecureInit read PBA: 0x404
- SecureInit read PBA: 0x804
- SecureInit read PBA: 0xc04
- SecureInit read PBA: 0x1004
- SecureInit read PBA: 0x1404
- SecureInit read PBA: 0x1804
- SecureInit read PBA: 0x1c04
- SecureInit ret = 0, SecureMode = 0
- atags_set_bootdev: ret:(0)
- GPT part: 0, name: uboot, start:0x4000, size:0x2000
- GPT part: 1, name: trust, start:0x6000, size:0x2000
- GPT part: 2, name: boot, start:0xa000, size:0x10000
- GPT part: 3, name: backup, start:0x2a000, size:0x10000
- GPT part: 4, name: rootfs, start:0x5a000, size:0xe89bfdf
- find part:uboot OK. first_lba:0x4000.
- find part:trust OK. first_lba:0x6000.
- LoadTrust Addr:0x6000
- No find bl30.bin
- Load uboot, ReadLba = 4000
- Load OK, addr=0x200000, size=0xd6fac
- RunBL31 0x10000
- NOTICE: BL31: v1.3(debug):370ab80
- NOTICE: BL31: Built : 09:23:41, Mar 4 2019
- NOTICE: BL31: Rockchip release version: v1.1
- INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
- INFO: Using opteed sec cpu_context!
- INFO: boot cpu mask: 0
- INFO: plat_rockchip_pmu_init(1181): pd status 3e
- INFO: BL31: Initializing runtime services
- INFO: BL31: Initializing BL32
- INF [0x0] TEE-CORE:init_primary_helper:337: Initializing (1.1.0-195-g8f090d20 #6 Fri Dec 7 06:11:20 UTC 2018 aarch64)
- INF [0x0] TEE-CORE:init_primary_helper:338: Release version: 1.2
- INF [0x0] TEE-CORE:init_teecore:83: teecore inits done
- INFO: BL31: Preparing for EL3 exit to normal world
- INFO: Entry point address = 0x200000
- INFO: SPSR = 0x3c9
- U-Boot 2017.09-02577-g0b1f585 (Apr 03 2019 - 10:12:37 +0800)
- Model: Firefly-RK3399 Board
- PreSerial: 2
- DRAM: 3.8 GiB
- Relocation Offset is: f5bee000
- Sysmem: init
- Using default environment
- dwmmc@fe320000: 1, sdhci@fe330000: 0
- Bootdev(atags): mmc 0
- PartType: EFI
- get part misc fail -1
- boot mode: normal
- bad resource image magic:
- DTB: rk-kernel.dtb
- invalid entry tag
- invalid entry tag
- invalid entry tag
- invalid entry tag
- invalid entry tag
- invalid entry tag
- invalid entry tag
- invalid entry tag
- "Synchronous Abort" handler, esr 0x96000010
- * Relocate offset = 00000000f5bee000
- * ELR(PC) = 000000000028407c
- * LR = 0000000000203a8c
- * SP = 00000000e9de2020
- * ESR_EL2 = 0000000096000010
- EC[31:26] == 100101, Exception from a Data abort, from current exception level
- IL[25] == 1, 32-bit instruction trapped
- * DAIF = 00000000000003c0
- D[9] == 1, DBG masked
- A[8] == 1, ABORT masked
- I[7] == 1, IRQ masked
- F[6] == 1, FIQ masked
- * SPSR_EL2 = 0000000020000349
- D[9] == 1, DBG masked
- A[8] == 1, ABORT masked
- I[7] == 0, IRQ not masked
- F[6] == 1, FIQ masked
- M[4] == 0, Exception taken from AArch64
- M[3:0] == 1001, EL2h
- * SCTLR_EL2 = 0000000030c51835
- I[12] == 1, Icaches enabled
- C[2] == 1, Dcache enabled
- M[0] == 1, MMU enabled
- * HCR_EL2 = 000000000800003a
- * VBAR_EL2 = 00000000f5dee800
- * TTBR0_EL2 = 00000000f7ff0000
- x0 : 000000000841e600 x1 : 00000000f5e8fb8e
- x2 : 0000000000000004 x3 : 00000000ff1a0000
- x4 : 0000000000000000 x5 : 0000000000000004
- x6 : 000000000841e600 x7 : 00000000f5ea7f40
- x8 : 00000000e9de20c0 x9 : 0000000000000008
- x10: 00000000ffffffd8 x11: 0000000000000006
- x12: 000000000001869f x13: 0000000000000200
- x14: 00000000e9de2418 x15: 0000000000000002
- x16: 0000000000000000 x17: 0000000000000000
- x18: 00000000e9de5d98 x19: 00000000f5ea5000
- x20: 0000000008300000 x21: 000000000841e600
- x22: 0000000000000000 x23: 000000000001f600
- x24: 0000000008300000 x25: 00000000f5ec2000
- x26: 0000000000000000 x27: 0000000000000000
- x28: 0000000000000000 x29: 00000000e9de2200
- SP:
- e9de2020: 00000000 00000000 00000000 00000000
- e9de2030: 00000000 00000000 f5e9be9f 00000000
- e9de2040: 00000000 00000000 00000000 00000000
- e9de2050: f5e9bee6 00000000 f5e9bf0c 00000000
- e9de2060: f5e9bf59 00000000 f5e9bfa6 00000000
- e9de2070: f5e9bfe6 00000000 f5e9c026 00000000
- e9de2080: f5e9c063 00000000 00000000 00000000
- e9de2090: 00000000 00000000 f5e9c0a0 00000000
- e9de20a0: e9de2200 00000000 f5deea0c 00000000
- e9de20b0: f5ea5000 00000000 08300000 00000000
- e9de20c0: f7ff0000 00000000 0800003a 00000000
- e9de20d0: 30c51835 00000000 e9de2020 00000000
- e9de20e0: 20000349 00000000 f5dee800 00000000
- e9de20f0: 000003c0 00000000 96000010 00000000
- e9de2100: f5e7207c 00000000 0841e600 00000000
- e9de2110: f5e8fb8e 00000000 00000004 00000000
- Resetting CPU ...
- WAR▒DDR Version 1.19 20190305
- In
- soft reset
- SRX
- Channel 0: DDR3, 800MHz
- Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
- Channel 1: DDR3, 800MHz
- Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
- 256B stride
- ch 0 ddrconfig = 0x101, ddrsize = 0x2020
- ch 1 ddrconfig = 0x101, ddrsize = 0x2020
- pmugrf_os_reg[2] = 0x3AA17AA1, stride = 0xD
- OUT
- Boot1: 2019-03-14, version: 1.19
- CPUId = 0x0
- ChipType = 0x10, 293
- SdmmcInit=2 0
- BootCapSize=100000
- UserCapSize=119276MB
- FwPartOffset=2000 , 100000
- mmc0:cmd8,20
- mmc0:cmd5,20
- mmc0:cmd55,20
- mmc0:cmd1,20
- mmc0:cmd8,20
- mmc0:cmd5,20
- mmc0:cmd55,20
- mmc0:cmd1,20
- mmc0:cmd8,20
- mmc0:cmd5,20
- mmc0:cmd55,20
- mmc0:cmd1,20
- SdmmcInit=0 1
- StorageInit ok = 67988
- SecureMode = 0
- SecureInit read PBA: 0x4
- SecureInit read PBA: 0x404
- SecureInit read PBA: 0x804
- SecureInit read PBA: 0xc04
- SecureInit read PBA: 0x1004
- SecureInit read PBA: 0x1404
- SecureInit read PBA: 0x1804
- SecureInit read PBA: 0x1c04
- SecureInit ret = 0, SecureMode = 0
- atags_set_bootdev: ret:(0)
- GPT part: 0, name: uboot, start:0x4000, size:0x2000
- GPT part: 1, name: trust, start:0x6000, size:0x2000
- GPT part: 2, name: boot, start:0xa000, size:0x10000
- GPT part: 3, name: backup, start:0x2a000, size:0x10000
- GPT part: 4, name: rootfs, start:0x5a000, size:0xe89bfdf
- find part:uboot OK. first_lba:0x4000.
- find part:trust OK. first_lba:0x6000.
- LoadTrust Addr:0x6000
- No find bl30.bin
- Load uboot, ReadLba = 4000
- Load OK, addr=0x200000, size=0xd6fac
- RunBL31 0x10000
- NOTICE: BL31: v1.3(debug):370ab80
- NOTICE: BL31: Built : 09:23:41, Mar 4 2019
- NOTICE: BL31: Rockchip release version: v1.1
- INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
- INFO: Using opteed sec cpu_context!
- INFO: boot cpu mask: 0
- INFO: plat_rockchip_pmu_init(1181): pd status 3e
- INFO: BL31: Initializing runtime services
- INFO: BL31: Initializing BL32
- INF [0x0] TEE-CORE:init_primary_helper:337: Initializing (1.1.0-195-g8f090d20 #6 Fri Dec 7 06:11:20 UTC 2018 aarch64)
- INF [0x0] TEE-CORE:init_primary_helper:338: Release version: 1.2
- INF [0x0] TEE-CORE:init_teecore:83: teecore inits done
- INFO: BL31: Preparing for EL3 exit to normal world
- INFO: Entry point address = 0x200000
- INFO: SPSR = 0x3c9
- U-Boot 2017.09-02577-g0b1f585 (Apr 03 2019 - 10:12:37 +0800)
- Model: Firefly-RK3399 Board
- PreSerial: 2
- DRAM: 3.8 GiB
- Relocation Offset is: f5bee000
- S
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