在调试OS04A10摄像头驱动的时,有视频流输出,但出现
设备树是这样配置: // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (c) 2021 Rockchip Electronics Co., Ltd. * */ / { cam_ircut0: cam_ircut { status = "okay"; compatible = "rockchip,ircut"; ircut-open-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; ircut-close-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; rockchip,camera-module-index = <0>; rockchip,camera-module-facing = "back"; }; vcc_mipidphy0: vcc-mipidcphy0-regulator { status = "okay"; compatible = "regulator-fixed"; gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&mipidphy0_pwr>; regulator-name = "vcc_mipidphy0"; enable-active-high; }; }; &csi2_dphy0 { status = "okay"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; mipidphy0_in_ucam0: endpoint@1 { reg = <1>; remote-endpoint = <&os04a10_out0>; data-lanes = <1 2>; }; }; port@1 { reg = <1>; #address-cells = <1>; #size-cells = <0>; csidphy0_out: endpoint@0 { reg = <0>; remote-endpoint = <&mipi2_csi2_input>; }; }; }; }; &csi2_dphy0_hw { status = "okay"; }; &i2c3 { status = "okay"; os04a10: os04a10@36 { compatible = "ovti,os04a10"; status = "okay"; reg = <0x36>; clocks = <&cru CLK_MIPI_CAMARAOUT_M3>; clock-names = "xvclk"; power-domains = <&power RK3588_PD_VI>; pinctrl-names = "rockchip,camera_default", "rockchip,camera_sleep"; pinctrl-0 = <&mipim0_camera3_clk>; reset-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; pwdn-gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; avdd-supply = <&vcc_mipidphy0>; // dovdd-supply = <&vcc_dovdd>; // dvdd-supply = <&vcc_dvdd>; rockchip,camera-module-sync-mode = "slave"; rockchip,camera-module-index = <0>; rockchip,camera-module-facing = "front"; rockchip,camera-module-name = "CMK-OT1607-FV1"; rockchip,camera-module-lens-name = "M12-40IRC-4MP-F16"; rockchip,camera-hdr-mode = <0>; //os04a10hk_CMK-OT1607-FV1_M12-40IRC-4MP-F16 lens-focus = <&cam_ircut0>; port { os04a10_out0: endpoint { remote-endpoint = <&mipidphy0_in_ucam0>; data-lanes = <1 2>; }; }; }; }; &mipi2_csi2 { status = "okay"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; mipi2_csi2_input: endpoint@1 { reg = <1>; remote-endpoint = <&csidphy0_out>; }; }; port@1 { reg = <1>; #address-cells = <1>; #size-cells = <0>; mipi2_csi2_output: endpoint@0 { reg = <0>; remote-endpoint = <&cif_mipi2_in0>; }; }; }; }; &pinctrl { cam { mipidphy0_pwr: mipidphy0-pwr { rockchip,pins = /* camera power en */ <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; }; }; }; &rkcif { status = "okay"; }; &rkcif_mipi_lvds2 { status = "okay"; port { cif_mipi2_in0: endpoint { remote-endpoint = <&mipi2_csi2_output>; }; }; }; &rkcif_mipi_lvds2_sditf { status = "disabled"; port { mipi_lvds2_sditf: endpoint { remote-endpoint = <&isp0_vir0>; }; }; }; &rkcif_mmu { status = "okay"; }; &rkisp0 { status = "disabled"; }; &isp0_mmu { status = "disabled"; }; &rkisp0_vir0 { status = "disabled"; port { #address-cells = <1>; #size-cells = <0>; isp0_vir0: endpoint@0 { reg = <0>; remote-endpoint = <&mipi_lvds2_sditf>; }; }; }; |
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