原理图使用RGMII Crystal 25M for PHY, RGMII_CLK input 125M for TX_CLK连接方式:连接方式和DEMO板一样;硬件连接的GMAC0; 软件按照文档已经配置了; &gmac0 { phy-mode = "rgmii"; clock_in_out = "input"; snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; snps,reset-active-low; /* Reset time is 20ms, 100ms for rtl8211f */ snps,reset-delays-us = <0 20000 100000>; assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&gmac0_clkin>; assigned-clock-rates = <0>, <125000000>; pinctrl-names = "default"; pinctrl-0 = <&gmac0_miim &gmac0_tx_bus2 &gmac0_rx_bus2 &gmac0_rgmii_clk &gmac0_rgmii_bus &gmac0_clkinout>; tx_delay = <0x30>; rx_delay = <0x10>; phy-handle = <&rgmii_phy0>; status = "okay"; }; gmac0: ethernet@fe2a0000 { compatible = "rockchip,rk3568-gmac", "snps,dwmac-4.20a"; reg = <0x0 0xfe2a0000 0x0 0x10000>; interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "macirq", "eth_wake_irq"; rockchip,grf = <&grf>; clocks = <&cru SCLK_GMAC0>, <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0_RX_TX>, <&cru CLK_MAC0_REFOUT>, <&cru ACLK_GMAC0>, <&cru PCLK_GMAC0>, <&cru SCLK_GMAC0_RX_TX>, <&cru CLK_GMAC0_PTP_REF>, <&cru PCLK_XPCS>; clock-names = "stmmaceth", "mac_clk_rx", "mac_clk_tx", "clk_mac_refout", "aclk_mac", "pclk_mac", "clk_mac_speed", "ptp_ref", "pclk_xpcs"; resets = <&cru SRST_A_GMAC0>; reset-names = "stmmaceth"; snps,mixed-burst; snps,tso; snps,axi-config = <&gmac0_stmmac_axi_setup>; snps,mtl-rx-config = <&gmac0_mtl_rx_setup>; snps,mtl-tx-config = <&gmac0_mtl_tx_setup>; status = "disabled"; mdio0: mdio { compatible = "snps,dwmac-mdio"; #address-cells = <0x1>; #size-cells = <0x0>; }; gmac0_stmmac_axi_setup: stmmac-axi-config { snps,wr_osr_lmt = <4>; snps,rd_osr_lmt = <8>; snps,blen = <0 0 0 0 16 8 4>; }; gmac0_mtl_rx_setup: rx-queues-config { snps,rx-queues-to-use = <1>; queue0 {}; }; gmac0_mtl_tx_setup: tx-queues-config { snps,tx-queues-to-use = <1>; queue0 {}; }; }; log显示 mdio关键字: [ 0.256145] libphy: Fixed MDIO Bus: probed [ 0.395107] mdio_bus stmmac-0: MDIO device at address 0 is missing. phy:关键字 PHY drv:clk:38,ca:38,DQ:30,odt:0 PHY drv:clk:38,ca:38,DQ:30,odt:0 PHY drv:clk:38,ca:38,DQ:30,odt:0 PHY drv:clk:38,ca:38,DQ:30,odt:60 rockchip_vop2_init:No hdmiphypll clk0 found, use system clk rockchip_vop2_init:No hdmiphypll clk1 found, use system clk rockchip_vop2_init:No hdmiphypll clk0 found, use system clk rockchip_vop2_init:No hdmiphypll clk1 found, use system clk PHY powered down in 0 iterations PHY PLL locked 1 iterations PHY powered down in 0 iterations PHY PLL locked 1 iterations [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x412fd050] [ 0.000000] arch_timer: cp15 timer(s) running at 24.00MHz (phys). [ 0.189446] rockchip-csi2-dphy csi2-dphy0: csi2 dphy0 probe successfully! [ 0.189580] rockchip-csi2-dphy-hw fe870000.csi2-dphy-hw: csi2 dphy hw probe successfully! [ 0.190823] phy phy-fe8a0000.usb2-phy.0: Linked as a consumer to regulator.5 [ 0.191017] phy phy-fe8a0000.usb2-phy.1: Linked as a consumer to regulator.6 [ 0.192165] extcon extcon1: failed to create extcon usb2-phy link [ 0.192265] phy phy-fe8b0000.usb2-phy.2: Linked as a consumer to regulator.5 [ 0.192383] phy phy-fe8b0000.usb2-phy.3: Linked as a consumer to regulator.5 [ 0.192467] phy phy-fe8b0000.usb2-phy.3: No vbus specified for otg port [ 0.204911] rochchip_p3phy_init: lock failed 0x6890000, check input refclk and power supply [ 0.204937] phy phy-fe8c0000.phy.9: phy init failed --> -110 [ 0.204953] rk-pcie 3c0800000.pcie: fail to init phy, err -110 [ 0.204966] rk-pcie 3c0800000.pcie: phy init failed [ 0.225390] rockchip-vop2 fe040000.vop: [drm:vop2_bind] vp0 assign plane mask: 0x2a, primary plane phy id: 5 [ 0.225416] rockchip-vop2 fe040000.vop: [drm:vop2_bind] vp1 assign plane mask: 0x15, primary plane phy id: 4 [ 0.225437] rockchip-vop2 fe040000.vop: [drm:vop2_bind] vp2 assign plane mask: 0x0, primary plane phy id: -1 [ 0.227016] dwhdmi-rockchip fe0a0000.hdmi: Detected HDMI TX controller v2.11a with HDCP (DWC HDMI 2.0 TX PHY) [ 0.256145] libphy: Fixed MDIO Bus: probed [ 0.257692] rk_gmac-dwmac fe2a0000.ethernet: integrated PHY? (no). [ 0.257734] rk_gmac-dwmac fe2a0000.ethernet: clock input from PHY [ 0.394845] libphy: stmmac: probed [ 1.656955] phy phy-fe8a0000.usb2-phy.1: charger = USB_SDP_CHARGER [ 4.845326] rockchip-vop2 fe040000.vop: [drm:vop2_bind] vp0 assign plane mask: 0x2a, primary plane phy id: 5 [ 4.845353] rockchip-vop2 fe040000.vop: [drm:vop2_bind] vp1 assign plane mask: 0x15, primary plane phy id: 4 [ 4.845373] rockchip-vop2 fe040000.vop: [drm:vop2_bind] vp2 assign plane mask: 0x0, primary plane phy id: -1 [ 4.847573] dwhdmi-rockchip fe0a0000.hdmi: Detected HDMI TX controller v2.11a with HDCP (DWC HDMI 2.0 TX PHY) [ 6.165941] rockchip-csi2-dphy0: No link between dphy and sensor [ 6.166446] rockchip-csi2-dphy0: No link between dphy and sensor [ 10.240619] [dhd] CFG80211-ERROR) wl_setup_wiphy : Registering Vendor80211 [ 10.244175] [dhd] CFG80211-ERROR) wl_setup_wiphy : SAE support [ 29.956018] rk_gmac-dwmac fe2a0000.ethernet eth0: Could not attach to PHY [ 29.956052] rk_gmac-dwmac fe2a0000.ethernet eth0: stmmac_open: Cannot attach to PHY (error: -19) 开机后没有eth0网络;原因就是 rk_gmac-dwmac fe2a0000.ethernet eth0: Could not attach to PHY;开机过程中量不到PHY送给GMAC的125MCLK;原因可能是什么呀? |
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