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发表于 2020-5-14 10:46:00
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11#
本帖最后由 firefly_zhongw 于 2020-5-14 11:34 编辑
- &acodec {
- rockchip,micbias1;
- rockchip,micbias2;
- rockchip,en-always-grps = <0 1 2 3>;
- rockchip,adc-grps-route = <1 0 3 2>;
- /delete-property/rockchip,loopback-grp;
- };
复制代码
1. 如果rockchip,adc-grps-route是<1 0 3 2>(表示MIC3为0通道),就把vad的rockchip,det-channel改成0
2. 接调试串口看log
==========================================================================================
# echo mem > /sys/power/state
[ 255.923423] PM: suspend entry 1970-01-01 00:04:17.450476955 UTC
[ 255.923486] PM: Syncing filesystems ...
[ 255.934946] mmc_host mmc1: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0)
[ 255.968669] mmc_host mmc1: Bus speed (slot 0) = 147456000Hz (slot req 150000000Hz, actual 147456000HZ div = 0)
[ 256.349343] dwmmc_rockchip ff490000.dwmmc: Successfully tuned phase to 242
[ 256.350742] done.
[ 256.351284] Freezing user space processes ... (elapsed 0.001 seconds) done.
[ 256.352932] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
[ 256.354452] Suspending console(s) (use no_console_suspend to debug)
IRQ=146
v1.3(release):30f1405, cnt=2, config=0x804040c:hwplldown-ddrsw-gating-24M-PWMregulator-Vdefault-sout-
b01234
Enabling: vad(1) acodec(1) pdm(0) i2s_2(1)
DDR: vpll0 | VOICE(sum): vpll0 | I2S: vpll0 | PWM: dpll | Enabling: apll dpll vpll0 | CRU_MODE: 3955
PMU Disabling: apll dpll vpll1
PMU: pd-000e wake-000c core-0bfb lo-180d hi-000e if-4001 24Mhz
5bRc6Aa78wfi 87aA6ab543210
IRQ=89 IRQ=146
PMU wakeup int: vad
VAD int=00000113
==========================================================================================
3. 如果唤醒太灵敏,参考文档doc目录下的《Rockchip_RK3308_Developer_Guide_Linux_VAD_Hardware_CN.pdf》,《Rockchip_RK3308_Developer_Guide_Linux_VAD_Register_Configuration_CN.pdf》。
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