雙LVDS屏調試

BBBBB · 发表于 2021-6-9 21:05:32

大家好，
目前嘗試在AIO-3288J板子且使用ubuntu的sdk上點亮雙LVDS的屏，遇到的狀況是黑屏，量測輸出的LVDS訊號發現偶訊號只有0.037伏特左右，而奇訊號有0.8伏特，表示偶訊號沒有正常輸出。

使用的dts文件為rk3288-firefly-aio-lvds.dts，dts中的lvds panel節點設置如下：
&lvds_panel {
      status = "okay";
      compatible ="simple-panel";
      power-supply = <&vcc_lcd>;
      backlight = <&backlight>;
      bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
      enable-delay-ms = <10>;
      rockchip,data-mapping = "vesa";
      rockchip,data-width = <24>;
      rockchip,output = "duallvds";

      display-timings {
            native-mode = <&timing0>;
            timing0: timing0 {
                     clock-frequency = <152000000>;
                     hactive = <1920>;
                     vactive = <1200>;
                     hback-porch = <96>;
                     hfront-porch = <32>;
                     vback-porch = <8>;
                     vfront-porch = <36>;
                     hsync-len = <50>;
                     vsync-len = <1>;
                     hsync-active = <0>;
                     vsync-active = <0>;
                     de-active = <1>;
                     pixelclk-active = <0>;
            };
      };
};

屏的規格如下圖：

參考其他版友的帖，所以其中水平時間參數都拿規格中的值再乘以2，想請教版友們是哪裡設定錯誤導致輸出的LVDS訊號不正確呢？

BBBBB · 发表于 2021-6-9 21:12:07

補充一下，同樣的屏有用一樣的AIO-3288J板子點亮過，只是是android的sdk，dts中的disaply timing參數設定如下：
         screen-type = <SCREEN_DUAL_LVDS>;
         lvds-format = <LVDS_8BIT_1>;
         out-face = <OUT_P888>;
         color-mode = <COLOR_RGB>;
         clock-frequency = <152000000>;
         hactive = <1920>;
         vactive = <1200>;
         hback-porch = <48>;
         hfront-porch = <16>;
         vback-porch = <8>;
         vfront-porch = <36>;
         hsync-len = <25>;
         vsync-len = <1>;
         hsync-active = <0>;
         vsync-active = <0>;
         de-active = <0>;
         pixelclk-active = <0>;
         swap-rb = <0>;
         swap-rg = <0>;
         swap-gb = <0>;

BBBBB · 发表于 2021-6-14 23:20:49

更新一下給未來也遇到同樣問題的人，如果要輸出雙LVDS訊號的話，需要加上一個參數叫dual-channel，display timing的部分則參考屏的規格書
&lvds {
status = "okay";
dual-channel;
}

&lvds_panel {
      status = "okay";
      compatible ="simple-panel";
      power-supply = <&vcc_lcd>;
      backlight = <&backlight>;
      bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
      enable-delay-ms = <10>;
      rockchip,data-mapping = "vesa";
      rockchip,data-width = <24>;
      rockchip,output = "duallvds";

      display-timings {
            native-mode = <&timing0>;
            timing0: timing0 {
                     clock-frequency = <152000000>; // 因為拿到的屏暫時是60Hz的
                     hactive = <1920>;
                     vactive = <1200>;
                     hback-porch = <48>;
                     hfront-porch = <16>;
                     vback-porch = <8>;
                     vfront-porch = <36>;
                     hsync-len = <25>;
                     vsync-len = <1>;
                     hsync-active = <0>;
                     vsync-active = <0>;
                     de-active = <1>;
                     pixelclk-active = <0>;
            };
      };
};

litreily · 发表于 2021-6-16 15:55:04

谢谢分享

fireman7 · 发表于 2023-5-10 16:56:58

不好意思~請問一下!!
SCREEN_DUAL_LVDS 是指RK3288輸出 2port 即(odd &even)點單一個屏
還是如你的標題是給雙LVDS屏應用?

BBBBB · 发表于 2023-11-14 11:11:04

fireman7 发表于 2023-5-10 16:56
不好意思~請問一下!!
SCREEN_DUAL_LVDS 是指RK3288輸出 2port 即(odd &even)點單一個屏
還是如你的標題是 ...

不好意思，表達不佳，我指的是2 port的單一屏

lmf159 · 发表于 2024-1-5 14:01:17

学习了