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rk3288 reload usb host1 识别问题
发表于 2017-6-28 18:24:41
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经过修改 host1 为 usb 接口 ,原装的 usb host 1 是接了硬盘接口 JM20329 经过测试时 是可以识别移动硬盘,
后来修改了 usb host 1 电路做 普通的 usb 接口 来使用发现 usb 识别不了U盘和其他普通的usb设备 , 请问 是不是要修改 usb host1 的驱动 吗?
而我另外的一个 usb host2 以前原装的板子是接 hub 的现在 我们修改电路去掉了 hub 直接接出来 做usb 口 是可以识别设备 。
现在是问题是usb host1 直接接出来是没有用的。
以图片是我的电路图 是usb host1 的电路图 (应该是没有问题), 大家看看是我驱动要修改 还是 电路图有问题,怎么解决这个问题
dts 我也是没有修改过的和 原本sdk 的dts 一致,以下是我的dts 相关usb 是否要修改 dst 请 帮忙指导一下。谢谢。
firefly-rk3288-reload.dts dts 中 和 usb 相关中
7 / {
8 fiq-debugger {
9 status = "disabled";
10 };
11
12 hsic-usb-hub{
13 compatible = "hub_reset";
14 reset,pin =<&gpio7 GPIO_A6 GPIO_ACTIVE_HIGH>; // hub reset pin
15 status = "disabled";
16 };
17
....................
169 usb_control {
170 compatible = "rockchip,rk3288-usb-control";
171
172 host_drv_gpio = <&gpio0 GPIO_B6 GPIO_ACTIVE_LOW>;
173 otg_drv_gpio = <&gpio0 GPIO_B4 GPIO_ACTIVE_LOW>;
174
175 rockchip,remote_wakeup;
176 rockchip,usb_irq_wakeup;
177 };
............................
783 /include/ "act8846.dtsi"
784 &act8846 {
785 gpios =<&gpio7 GPIO_B6 GPIO_ACTIVE_LOW>,<&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>;
786 cpu_det_gpio =<&gpio7 GPIO_B2 GPIO_ACTIVE_LOW>;
787 usb_hub_reset_gpio =<&gpio8 GPIO_A3 GPIO_ACTIVE_LOW>;
788 act8846,system-power-controller;
789
790 regulators {
......................
在 rk3288.dtsi 和 usb 相关
dwc_control_usb: dwc-control-usb@ff770284 {
compatible = "rockchip,rk3288-dwc-control-usb";
reg = <0xff770284 0x04>, <0xff770288 0x04>,
<0xff7702cc 0x04>, <0xff7702d4 0x04>,
<0xff770320 0x14>, <0xff770334 0x14>,
<0xff770348 0x10>, <0xff770358 0x08>,
<0xff770360 0x08>;
reg-names = "GRF_SOC_STATUS1" ,"GRF_SOC_STATUS2",
"GRF_SOC_STATUS19", "GRF_SOC_STATUS21",
"GRF_UOC0_BASE", "GRF_UOC1_BASE",
"GRF_UOC2_BASE", "GRF_UOC3_BASE",
"GRF_UOC4_BASE";
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "otg_id", "otg_bvalid",
"otg_linestate", "host0_linestate",
"host1_linestate";
clocks = <&clk_gates7 9>, <&usbphy_480m>,
<&otgphy1_480m>, <&otgphy2_480m>;
clock-names = "hclk_usb_peri", "usbphy_480m",
"usbphy1_480m", "usbphy2_480m";
usb_bc {
compatible = "synopsys,phy";
/* offset bit mask */
rk_usb,bvalid = <0x288 14 1>;
rk_usb,iddig = <0x288 17 1>;
rk_usb,dcdenb = <0x328 14 1>;
rk_usb,vdatsrcenb = <0x328 7 1>;
rk_usb,vdatdetenb = <0x328 6 1>;
rk_usb,chrgsel = <0x328 5 1>;
rk_usb,chgdet = <0x2cc 23 1>;
rk_usb,fsvminus = <0x2cc 25 1>;
rk_usb,fsvplus = <0x2cc 24 1>;
};
};
usb0: usb@ff580000 {
compatible = "rockchip,rk3288_usb20_otg";
reg = <0xff580000 0x40000>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates13 4>, <&clk_gates7 4>;
clock-names = "clk_usbphy0", "hclk_usb0";
resets = <&reset RK3288_SOFT_RST_USBOTG_H>, <&reset RK3288_SOFT_RST_USBOTGPHY>,
<&reset RK3288_SOFT_RST_USBOTGC>;
reset-names = "otg_ahb", "otg_phy", "otg_controller";
/*0 - Normal, 1 - Force Host, 2 - Force Device*/
rockchip,usb-mode = <0>;
};
usb1: usb@ff540000 {
compatible = "rockchip,rk3288_usb20_host";
reg = <0xff540000 0x40000>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates13 6>, <&clk_gates7 7>,
<&usbphy_480m>;
clock-names = "clk_usbphy1", "hclk_usb1",
"usbphy_480m";
resets = <&reset RK3288_SOFT_RST_USBHOST1_H>, <&reset RK3288_SOFT_RST_USBHOST1PHY>,
<&reset RK3288_SOFT_RST_USBHOST1C>;
reset-names = "host1_ahb", "host1_phy", "host1_controller";
};
usb2: usb@ff500000 {
compatible = "rockchip,rk3288_rk_ehci_host";
reg = <0xff500000 0x20000>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates13 5>, <&clk_gates7 6>;
clock-names = "clk_usbphy2", "hclk_usb2";
resets = <&reset RK3288_SOFT_RST_USBHOST0_H>, <&reset RK3288_SOFT_RST_USBHOST0PHY>,
<&reset RK3288_SOFT_RST_USBHOST0C>, <&reset RK3288_SOFT_RST_USB_HOST0>;
reset-names = "ehci_ahb", "ehci_phy", "ehci_controller", "ehci";
};
usb3: usb@ff520000 {
compatible = "rockchip,rk3288_rk_ohci_host";
reg = <0xff520000 0x20000>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates13 5>, <&clk_gates7 6>;
clock-names = "clk_usbphy3", "hclk_usb3";
status = "okay";
};
usb4: usb@ff5c0000 {
compatible = "rockchip,rk3288_rk_ehci1_host";
reg = <0xff5c0000 0x40000>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ehci1phy_480m>, <&clk_gates7 8>,
<&ehci1phy_12m>, <&usbphy_480m>,
<&otgphy1_480m>, <&otgphy2_480m>;
clock-names = "ehci1phy_480m", "hclk_ehci1",
"ehci1phy_12m", "usbphy_480m",
"ehci1_usbphy1", "ehci1_usbphy2";
resets = <&reset RK3288_SOFT_RST_EHCI1>, <&reset RK3288_SOFT_RST_EHCI1_AUX>,
<&reset RK3288_SOFT_RST_EHCI1PHY>;
reset-names = "ehci1_ahb", "ehci1_aux", "ehci1_phy";
};
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