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标题: RK3588J 的 RK806 上电不正常 [打印本页]

作者: rkfly 时间: 2023-3-24 09:30
标题: RK3588J 的 RK806 上电不正常
刷firefly官方固件和 SDK编译固件，uboot 启动都出现如下打印：
是什么原因导致的？

DDR Version V1.08 20220617
LPDDR4X, 2112MHz
channel[0] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
channel[1] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
channel[2] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
channel[3] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
Manufacturer ID:0x1 Samsung
CH0 RX Vref:31.7%, TX Vref:20.8%,19.8%
CH1 RX Vref:34.7%, TX Vref:21.8%,19.8%
CH2 RX Vref:31.7%, TX Vref:18.8%,18.8%
CH3 RX Vref:29.7%, TX Vref:20.8%,20.8%
change to F1: 528MHz
change to F2: 1068MHz
change to F3: 1560MHz
change to F0: 2112MHz
out
U-Boot SPL board init
U-Boot SPL 2017.09-gc060f28d70-220414 #zyf (Apr 18 2022 - 18:13:34)
Failed to set cpub01
Failed to set cpub23
unknown raw ID phN
unrecognized JEDEC id bytes: 00, 00, 00
Trying to boot from MMC2
MMC: no card present
mmc_init: -123, time 0
spl: mmc init failed with error: -123
Trying to boot from MMC1
Trying fit image at 0x4000 sector
## Verified-boot: 0
## Checking atf-1 0x00040000 ... sha256(bb1bbbc832...) + OK
## Checking uboot 0x00200000 ... sha256(38dea808c5...) + OK
## Checking fdt 0x0035d6e8 ... sha256(c07f4a4d71...) + OK
## Checking atf-2 0x000f0000 ... sha256(30812190d0...) + OK
## Checking atf-3 0xff100000 ... sha256(cb7bdbec2b...) + OK
## Checking optee 0x08400000 ... sha256(fde0860845...) + OK
Jumping to U-Boot(0x00200000) via ARM Trusted Firmware(0x00040000)
Total: 117.281 ms

INFO: Preloader serial: 2
NOTICE:  BL31: v2.3():v2.3-499-ge63a16361:derrick.huang
NOTICE:  BL31: Built : 10:58:38, Jan 10 2023
INFO: spec: 0x1
INFO: ext 32k is not valid
INFO: ddr: stride-en 4CH
INFO: GICv3 without legacy support detected.
INFO: ARM GICv3 driver initialized in EL3
INFO: valid_cpu_msk=0xff bcore0_rst = 0x0, bcore1_rst = 0x0
INFO: system boots from cpu-hwid-0
INFO: idle_st=0x21fff, pd_st=0x11fff9, repair_st=0xfff70001
INFO: dfs DDR fsp_params[0].freq_mhz= 2112MHz
INFO: dfs DDR fsp_params[1].freq_mhz= 528MHz
INFO: dfs DDR fsp_params[2].freq_mhz= 1068MHz
INFO: dfs DDR fsp_params[3].freq_mhz= 1560MHz
INFO: BL31: Initialising Exception Handling Framework
INFO: BL31: Initializing runtime services
INFO: BL31: Initializing BL32
INFO: hdmirx_handler: dma not on, ret
I/TC:
I/TC: OP-TEE version: 3.13.0-652-g4542e1efd #derrick.huang (gcc version 10.2.1 20201103 (GNU Toolchain for the A-profile Architecture 10.2-2020.11 (arm-10.16))) #5 2022年 09月 20日星期二 09:41:09 CST aarch64
I/TC: Primary CPU initializing
I/TC: Primary CPU switching to normal world boot
INFO: BL31: Preparing for EL3 exit to normal world
INFO: Entry point address = 0x200000
INFO: SPSR = 0x3c9

U-Boot 2017.09(u-boot commit id: 0c26676955)(sdk version: rk3588_linux_release_20230301_v1.0.6e)-g0c26676955-dirty #wan (Mar 23 2023 - 13:56:32 +0800)

Model: Rockchip RK3588 Evaluation Board
PreSerial: 2, raw, 0xfeb50000
DRAM:  7.7 GiB
Sysmem: init
Relocation Offset: eda19000
Relocation fdt: eb9fa3b8 - eb9fecd0
CR: M/C/I
Using default environment

mmc@fe2c0000: 1, mmc@fe2e0000: 0
Bootdev(atags): mmc 0
MMC0: HS200, 200Mhz
PartType: EFI
DM: v2
boot mode: None
FIT: no signed, no conf required
** Unrecognized filesystem type **
DTB: rk-kernel.dtb
HASH(c): OK
I2c0 speed: 100000Hz
vsel-gpios- not found!
en-gpios- not found!
vdd_cpu_big0_s0 800000 uV
vsel-gpios- not found!
en-gpios- not found!
vdd_cpu_big1_s0 800000 uV
I2c1 speed: 100000Hz
vsel-gpios- not found!
en-gpios- not found!
read reg[0x03] failed, ret=-121
Failed to get chip ID!
spi2: RK806: 2
ON=0x00, OFF=0x00
vdd_gpu_s0 750000 uV
vdd_cpu_lit_s0 750000 uV
vdd_log_s0 750000 uV
vdd_vdenc_s0 init 750000 uV
vdd_ddr_s0 850000 uV
I2c6 speed: 400000Hz
Error reading output register
Error reading output register
Error reading output register
Error reading output register
Error reading output register
Error reading output register
Error reading output register
Error reading output register
Error reading output register
rockchip_panel_probe: Cannot get enable GPIO: -121
Error reading output register
rockchip_panel_probe: Cannot get enable GPIO: -121
get vp0 plane mask:0x5, primary id:2, cursor_plane:-1, from dts
get vp1 plane mask:0xa, primary id:3, cursor_plane:-1, from dts
get vp2 plane mask:0x140, primary id:8, cursor_plane:-1, from dts
get vp3 plane mask:0x280, primary id:9, cursor_plane:-1, from dts
Could not find baseparameter partition
pre init conn error
Model: Firefly ITX-3588J MIPI101(Android)
Rockchip UBOOT DRM driver version: v1.0.1
vp0 have layer nr:2[0 2 ], primary plane: 2
vp1 have layer nr:2[1 3 ], primary plane: 3
vp2 have layer nr:2[6 8 ], primary plane: 8
vp3 have layer nr:2[7 9 ], primary plane: 9
edid base block is 0, get edid failed
can't get edid block:0
failed to get edid
Could not find baseparameter partition
color_format:0
hdmi_select_link_config use tmds mode
mode:1920x1080 bus_format:0x100a
hdmi@fde80000:  detailed mode clock 148500 kHz, flags[5]
H: 1920 2008 2052 2200
V: 1080 1084 1089 1125
bus_format: 100a
VOP update mode to: 1920x1080p60, type: HDMI0 for VP0
dclk:148500,if_pixclk_div;2,if_dclk_div:4
hdptx_ropll_cmn_config bus_width:16a8c8 rate:1485000
hdptx phy pll locked!
hdptx_ropll_cmn_config bus_width:16a8c8 rate:1485000
hdptx phy pll locked!
VP0 set crtc_clock to 1485KHz
VOP VP0 enable Esmart0[500x501->500x501@710x289] fmt[1] addr[0xedfb8000]
CEA mode used vic=16
mtmdsclock:148500000
hdptx_ropll_cmn_config bus_width:16a8c8 rate:1485000
hdptx phy pll locked!
hdptx_ropll_cmn_config bus_width:16a8c8 rate:1485000
hdptx phy pll locked!
dw_hdmi_setup HDMI mode
don't use dsc mode
dw hdmi qp use tmds mode
bus_width:0x16a8c8,bit_rate:1485000
hdptx phy lane locked!
hdmi@fdea0000 disconnected
CLK: (uboot. arm: enter 1008000 KHz, init 1008000 KHz, kernel 0N/A)
  b0pll 24000 KHz
  b1pll 24000 KHz
  lpll 24000 KHz
  v0pll 24000 KHz
  aupll 786431 KHz
  cpll 1500000 KHz
  gpll 1188000 KHz
  npll 850000 KHz
  ppll 1100000 KHz
  aclk_center_root 702000 KHz
  pclk_center_root 100000 KHz
  hclk_center_root 396000 KHz
  aclk_center_low_root 500000 KHz
  aclk_top_root 594000 KHz
  pclk_top_root 100000 KHz
  aclk_low_top_root 396000 KHz
Net: eth0: ethernet@fe1b0000, eth1: ethernet@fe1c0000

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作者: rkfly 时间: 2023-3-24 11:29
read reg[0x03] failed, ret=-121
Failed to get chip ID!

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