[已解决]AIO3399c ai (未贴npu) 适配新屏幕

糖炒栗子 · 发表于 2021-3-3 15:38:02

本帖最后由糖炒栗子于 2021-3-9 13:25 编辑

我想给AIO3399c 配置一块新屏幕,但是panel-init-sequence参数无法确定,找了一圈也没有什么文档,请问该如何生成该参数.

糖炒栗子 · 发表于 2021-3-4 16:44:47

找到了一个配置工具,但是dsi 参数去哪儿找啊.原理图嘛?

jpchen · 发表于 2021-3-4 19:39:01

糖炒栗子发表于 2021-3-4 16:44
找到了一个配置工具,但是dsi 参数去哪儿找啊.原理图嘛?

sdk 里面有包含800x1280单lvds 和 1920x1080 双lvds 配置

糖炒栗子 · 发表于 2021-3-5 19:52:36

jpchen 发表于 2021-3-4 19:39
sdk 里面有包含800x1280单lvds 和 1920x1080 双lvds 配置

我找到那个示例了,使用生成工具生成了一个init-param,现在点亮屏幕后会闪一下,然后就一直黑着?大概会是那个部分配置错误了?

糖炒栗子 · 发表于 2021-3-5 19:58:53

dts文件

#include "rk3399-firefly-aioc-ai.dtsi"
/ {
model = "AIO-3399C(AI) 10.1 inches LVDS HSX101H40C (Android)";
compatible = "rockchip,android", "rockchip,rk3399-firefly-lvds", "rockchip,rk3399";
};
&backlight {
status = "okay";
pwms = <&pwm0 0 50000 1>;
enable-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
default-brightness-level = <200>;
polarity = <1>;
brightness-levels = <36 37 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255>;
};
&dsi {
status = "okay";
rockchip,lane-rate = <530>; //lvds_clock*6*2
dsi_panel: panel {
compatible ="simple-panel-dsi";
reg = <0>;
//ddc-i2c-bu
//power-supply = <&vcc_lcd>;
//pinctrl-0 = <&lcd_panel_reset &lcd_panel_enable>;
backlight = <&backlight>;
/*
enable-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpio4 29 GPIO_ACTIVE_LOW>;
*/
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
//bus-format = <MEDIA_BUS_FMT_RGB666_1X18>;
//dsi,lvds-force-clk = <800>; // 800/2/3 ~= 65Mhz
dsi,lanes = <4>;
dsi,channel = <0>;
enable-delay-ms = <35>;
prepare-delay-ms = <6>;
unprepare-delay-ms = <0>;
disable-delay-ms = <20>;
size,width = <120>;
size,height = <170>;
status = "okay";
panel-init-sequence = [
29 02 06 3C 01 09 00 07 00 //PPI_TX_RX_TA,[10:0]=1.5*PPI_LPTXTIMECNT=9,[26:16]=(5*PPI_LPTXTIMECNT-3)*4=7
29 02 06 14 01 06 00 00 00 //PPI_LPTXTIMECNT=6
29 02 06 64 01 0B 00 00 00 //PPI_D0S_CLRSIPOCOUNT
29 02 06 68 01 0B 00 00 00 //PPI_D1S_CLRSIPOCOUNT
29 02 06 6C 01 0B 00 00 00 //PPI_D2S_CLRSIPOCOUNT
29 02 06 70 01 0B 00 00 00 //PPI_D3S_CLRSIPOCOUNT
29 02 06 34 01 0F 00 00 00 //OK //PPI_LANEENABLE 1F
29 02 06 10 02 0F 00 00 00 //OK //DSI_LANEENABLE 1F
29 02 06 04 01 01 00 00 00 //OK //PPI_STARTPPI
29 02 06 04 02 01 00 00 00 //DSI_START,has removed
29 02 06 50 04 20 01 F0 03 //OK //VPCTRL, 00000011 11110000 00000001 00100000 = bit0(0:msf disable),bit8(1:RGB888),bit17,18,19(0:hs,de,vs active Low),bit29:20(3F:vs delay 63)
//1280*800
29 02 06 54 04 04 00 1A 00 //OK //HTIM1, 00000000 10110100 00000000 00110010 = bit8:0(0x14:hs pulse width 20pixel),bit24:16(0xf0: h back porch 240pixel)
29 02 06 58 04 00 05 14 00 //OK //HTIM2, 00000000 01001000 00000111 10000000 = bit10:0(0x400:h active 1024pixel),bit24:16(0x3c: h front porch 60pixel)
29 02 06 5C 04 01 00 06 00 //OK //VTIM1, 00000000 00011001 00000000 00001010 = bit7:0(0x0c:vs pulse width 12pixel),bit23:16(0x14: v back porch 20pixel)
29 02 06 60 04 20 03 03 00 //OK //VTIM2, 00000000 00001010 00000100 00111000 = bit10:0(0x258:v active 600pixel),bit23:16(0x0c: v front porch 12pixel)
29 02 06 64 04 01 00 00 00 //OK //VFUEN, 1 update timing parameters(HTIM1,HTIM2...)
29 02 06 A0 04 06 80 44 00 //OK //LVPHY0, 00000000 01000100 10000000 00000110 = bit4:0(00110:vf 60~85MHZ),bit6:5(00:60~85Mhz),bit10(1:reduced range)
29 02 06 A0 04 06 80 04 00 //OK //LVPHY0, bit22(0:normal ,1:reset)
29 02 06 04 05 04 00 00 00 //OK //SYSRST,
29 02 06 80 04 00 01 02 03 //R0,R1,R2,R3
29 02 06 84 04 04 07 05 08 //R4,R7,R5,G0
29 02 06 88 04 09 0A 0E 0F //G1,G2,G6,G7
29 02 06 8C 04 0B 0C 0D 10 //G3,G4,G5,B0
29 02 06 90 04 16 17 11 12 //B6,B7,B1,B2
29 02 06 94 04 13 14 15 1B //B3,B4,B5,0
29 02 06 98 04 18 19 1A 06 //HS,VS,DE,R6
29 02 06 9C 04 31 04 00 00 //LVCFG, 00000000 00000000 00000100 00110001 = bit0(1:lvds enbale),bit1(0:singlelvds,1:duallvds),bit7:4(3:pclk divide option divide by 3),bit11:10(01:DCLK=DSI_CLK/2)
];
panel-exit-sequence = [
05 05 01 28
05 78 01 10
];
power_ctr: power_ctr {
rockchip,debug = <0>;
power_enable = <1>;
lcd_en:lcd_en {
gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_panel_lcd_en>;
rockchip,delay = <10>;
};
lcd_pwr_en: lcd-pwr-en {
gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_panel_pwr_en>;
rockchip,delay = <10>;
};
lcd_rst: lcd-rst {
gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_panel_reset>;
rockchip,delay = <6>;
};
};
disp_timings: display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <65000000>;
hactive = <1280>;
vactive = <800>;
hback-porch = <26>;
hfront-porch = <20>;
vback-porch = <6>;
vfront-porch = <3>;
hsync-len = <4>;
vsync-len = <1>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <00>;
pixelclk-active = <0>;
};
};
};
};

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错误日志

[ 0.404292] rockchip-drm display-subsystem: defer getting devfreq
[ 0.404584] rockchip-vop ff900000.vop: missing rockchip,grf property
[ 0.404836] rockchip-vop ff900000.vop: unable to request PWM
[ 0.404866] rockchip-drm display-subsystem: bound ff900000.vop (ops vop_component_ops)
[ 0.404910] rockchip-vop ff8f0000.vop: missing rockchip,grf property
[ 0.405081] rockchip-vop ff8f0000.vop: unable to request PWM
[ 0.405097] rockchip-drm display-subsystem: bound ff8f0000.vop (ops vop_component_ops)
[ 0.405119] rockchip-drm display-subsystem: failed to bind ff960000.dsi (ops dw_mipi_dsi_ops): -517
[ 0.405366] rockchip-drm display-subsystem: master bind failed: -517
[ 0.407273] ff960000.dsi.0 supply power not found, using dummy regulator
[ 0.407987] mali ff9a0000.gpu: Failed to get regulator
[ 0.408003] mali ff9a0000.gpu: Power control initialization failed
[ 0.408333] Unable to detect cache hierarchy for CPU 0
[ 0.416463] brd: module loaded

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jpchen · 发表于 2021-3-6 09:24:01

在build.prop 里面添加如下

sys.hwc.device.primary=DSI
sys.hwc.device.extend=HDMI-A

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糖炒栗子 · 发表于 2021-3-7 20:36:44

jpchen 发表于 2021-3-6 09:24
在build.prop 里面添加如下

试过了,不行.我明天拿示波器看看.

糖炒栗子 · 发表于 2021-3-8 18:25:18

最后把 &route_dsi disabled 后就可以显示了.应该uboot部分还有问题.不过我们不需要开机logo,忽略也没关系.以后有功夫再搞.

[硬件交流] [已解决]AIO3399c ai (未贴npu) 适配新屏幕

【硬件交流】 [已解决]AIO3399c ai (未贴npu) 适配新屏幕

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