|
【Android】
rk3566jd4 设置spi1及spi3报错系统无法正常进入
发表于 2022-9-30 11:36:03
浏览:5739
|
回复:3
打印
只看该作者
[复制链接]
楼主
本帖最后由 zhu944567126 于 2022-9-30 11:38 编辑
[ 0.463518] Key type .fscrypt registered
[ 0.463888] Key type fscrypt-provisioning registered
[ 0.464636] pstore: Using compression: deflate
[ 0.466459] rga2: Driver loaded successfully ver:3.2.63318
[ 0.467272] rga2: Module initialized.
[ 0.485384] vendor storage:20190527 ret = 0
[ 0.485799] mmcblk2: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12 p13 p14 p15
[ 0.495239] rockchip-pinctrl pinctrl: failed to parse function
[ 0.495859] rockchip-pinctrl: probe of pinctrl failed with error -22
[ 0.499382] rockchip-usb2phy fe8a0000.usb2-phy: failed to create phy
[ 0.500595] rockchip-usb2phy fe8b0000.usb2-phy: failed to create phy
[ 0.502098] mpp_rkvenc fdf40000.rkvenc: probing start
[ 0.503141] mpp_rkvenc fdf40000.rkvenc: venc regulator not ready, retry
[ 0.503769] rkvenc_init:1199: failed to add venc devfreq
[ 0.506803] mali fde60000.gpu: Kernel DDK version g7p1-01bet0
[ 0.507414] dwc3 fcc00000.dwc3: Failed to get clk 'ref': -2
[ 0.507443] mali fde60000.gpu: Device initialization Deferred
[ 0.508332] dwc3 fd000000.dwc3: Failed to get clk 'ref': -2
[ 0.512602] rockchip,bus bus-npu: failed to get bus regulator
[ 0.513184] rockchip,bus bus-npu: failed to init power control
[ 0.514106] rockchip-saradc fe720000.saradc: failed to get regulator, -517
[ 0.516682] reg-fixed-voltage vcc5v0-host-regulator: ignoring dependency for device, assuming no driver
[ 0.517768] reg-fixed-voltage vcc5v0-otg-regulator: ignoring dependency for device
我的2个spi配置为
&spi1 {
status = "okay";
max-freq = <48000000>;
pinctrl-names = "default";
pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
spidev1@10 {
compatible = "rockchip,spidev1";
reg = <0>; //chip select 0:cs0 1:cs1
spi-max-frequency = <10000000>; //spi output clock
};
};
&spi3 {
status = "okay";
max-freq = <48000000>;
pinctrl-names = "default";
pinctrl-0 = <&spi3_clk &spi3_tx &spi3_rx &spi3_cs0>;
spidev3@30 {
compatible = "rockchip,spidev3";
reg = <0>; //chip select 0:cs0 1:cs1
//id = <0>;
spi-max-frequency = <10000000>; //spi output clock
//spi-cpha; not support
//spi-cpol; //if the property is here it is 1:clk is high, else 0:clk is low when idle
};
};
&pinctrl {
spi1 {
spi1_clk: spi1-clk {
rockchip,pins = <4 19 RK_FUNC_2 &pcfg_pull_up>;
};
spi1_cs0: spi1-cs0 {
rockchip,pins = <4 18 RK_FUNC_2 &pcfg_pull_up>;
};
spi1_rx: spi1-rx {
rockchip,pins = <4 17 RK_FUNC_2 &pcfg_pull_up>;
};
spi1_tx: spi1-tx {
rockchip,pins = <4 1 RK_FUNC_2 &pcfg_pull_up>;
};
};
spi3 {
spi3_clk: spi3-clk {
rockchip,pins = <5 19 RK_FUNC_1 &pcfg_pull_up>;
};
spi3_cs0: spi3-cs0 {
rockchip,pins = <5 22 RK_FUNC_1 &pcfg_pull_up>;
};
spi3_rx: spi3-rx {
rockchip,pins = <5 21 RK_FUNC_1 &pcfg_pull_up>;
};
spi3_tx: spi3-tx {
rockchip,pins = <5 18 RK_FUNC_1 &pcfg_pull_up>;
};
};
}
|
|